Electronic equipment with a CCD image sensor mounted, such as a mobile phone with a camera and a digital camera has been widely popularized. The CCD image sensor contains a light receiving section that generates and accumulates electric charges based on incident light, and a charge transfer section for transferring the charges. The charges accumulated in the light receiving section of a pixel are read through a read transfer gate. The read transfer gate generates an inclined potential distribution based on an applied voltage. The accumulated charges are transferred and read in accordance with the inclined potential distribution.
In the CCD image sensor, typically, as a pixel size becomes larger, a read time becomes longer. There is a case that the size of the pixel is specified by a user. In such a case, when the large pixel size is specified, it takes a long time to read the charges in a usual structure, and a part of the charges is sometimes remained in the read. For this reason, as a technique which can shorten the read time and suppress the charge remainder, techniques disclosed in Patent Literatures 1 to 3 are known.
FIGS. 1A to 1C are diagrams showing the structure of a CCD image sensor disclosed in the Patent Literature 1. FIGS. 1A to 1C show the structure of one pixel of the CCD image sensor in which the pixel has the width of 10 μm and the length of 20 μm. FIG. 1A is a plan view showing the pixel of the CCD image sensor, FIG. 1B is a sectional view of the CCD image sensor along the line Al-A2, and FIG. 1C is a diagram showing an inclined potential distribution.
The charges are generated through photo-electrical conversion and accumulated in a pixel 101, and then are read through a transfer gate 102 into a CCD register 103. The pixel 101 is separated by an element separation region 104 formed through p-type impurity diffusion. In the technique described in the Patent Literature 1, ion implantation is performed into the pixel to form steps in the potential distribution. As shown in FIG. 1B, the ion implantation is performed two times to accomplish the structure of the CCD image sensor with three steps. With such a structure, the inclined potential distribution toward the transfer gate 102 is generated to improve the read time.
Also, FIGS. 2A to 2D are diagrams showing the structure of a CCD image sensor described in the Patent Literature 2. FIGS. 2A to 2D show the structure of the CCD image sensor in which the pixel has the width of 10 μm and the length of 20 μm. FIG. 2A is a plan view of the CCD image sensor, FIG. 2B is a graph showing an inclined potential distribution along the line A1-A2 shown in FIG. 2A, and FIG. 2C is a cross sectional view along the lines B1-B2 shown in FIG. 2A, and FIG. 2D is a cross sectional view along the lines C1-C2 shown in FIG. 2A.
Referring to FIGS. 2A to 2D, ion implantation is performed to form a p-type tapered impurity diffusion region so as to have an inclined potential distribution in a charge read direction from the pixel 201 to a CCD register 203 through the transfer gate 202. The pixel 201 is separated by an element separation region 204. With such a configuration and narrow channel effect, the inclined potential distribution is generated to reduce the read time.
In the technique described in the Patent Literature 1, although the inclined potential distribution is generated, a range of inclination of the potential distribution generated in one step is limited. Thus, when the pixel length becomes long, the number of steps increases to widen the inclination range. In such a case, one photo-resist mask is required for each step. Therefore, as the pixel length becomes longer, the cost is increased.
Also, the Patent Literature 3 discloses a solid-state image sensing device in which charge transfer efficiency is maximized. In the solid-state image sensing device, a photo-diode has a slender trapezoidal shape in which the widths of both ends are different. Consequently, since an inclined potential distribution can be generated by a photo-diode region and an HCCD region, the transfer efficiency can be improved on the charge transfer side. Therefore, the transfer efficiency can be maintained even if the frequency of a clock signal which is applied to a first polysilicon gate electrode and a second polysilicon gate electrode becomes high.
Citation List:
    [Patent Literature 1]: JP 2000-236081A    [Patent Literature 2]: JP-A-Heisei 5-283670    [Patent Literature 3]: JP-A-Heisei 7-240505